IDDAC #

Brief #

iddac (loaded by conf/template/id_dac.txt as id_dac) is a one shot identification on the F4 board that searches the F3 hardware overcurrent comparator threshold hv0.dac that trips at a wanted phase current cur (A peak). It drives hv0 in current mode itself, bisects the dac, and prints the hv0.dac = ... line to append to the config. Nothing is saved; for normal operation use ocdac or a fixed hv0.dac.

Component Explanation #

1. Procedure:

• Set conf0.max_ac_cur to at least 1.1 x cur (1.2 x in mode 1). cur must be over 1 A, at most cur_max and under max_cur / 1.05 (mode 0) or max_cur / 1.2 (mode 1), otherwise the run fails with fail = 1. Too low a max_cur also lets the F3 software trip (fault 15) or fault0 fire first and stop the run.
• link id_dac (or load the template). It disables pid0, fault0.pos_error and fault0.sat, routes hv0.en, cmd_mode, d_cmd, q_cmd, pos and dac from this component, and inserts hv_error between hv0.fault and fault0.hv_error. The template sets mode = 1 and cur = 20.
• Enable the drive. The run starts on en > 0, state goes to 1, and at the end the result is printed in the console (green) or the failure reason (red). Append the printed line to the config and reset: a finished run (state = 2) is a one shot and does not repeat until reset; after a failure, dropping en returns state to 0 and the next enable runs again.
• Expect one comparator trip per ramp, a few dozen in all.

2. Search (rt):

• The comparators are one-sided, so the bridge trips only with the current vector at 60, 180 and 300 deg el.
• For each dac tried: bridge off, wait for hv_fault to clear (up to 2 s, else fail = 3) and 0.1 s settle, then the d current ramps at ramp A/s from 1 A (after 0.1 s alignment) until the F3 reports HV_OVERCURRENT_HW or the ramp reaches cur. After a trip the bridge stays off 0.3 s.
• A dac passes when every tested angle trips by cur. dac_lo must pass (else fail = 4) and dac_hi must fail (else fail = 5); then bisection finds the highest passing dac, so no angle trips above cur.
• Any other hv fault during a ramp stops with fail = 2.

3. Mode 0, free axis:

• pos is set to the three fixed angles 60, 180, 300 deg in turn (the unloaded rotor aligns to them), so all three comparators are tested.

4. Mode 1, loaded or blocked axis:

• pos follows the rotor (com_pos) and the current stays on d, so it makes no torque and the rotor need not move.
• The current vector then sits at the rotor angle or opposite it; each ramp takes the d sign whose vector lies within 30 deg of a trip angle and counts the current that phase sees, |i| * cos(offset), against cur (the vector goes up to 1.155 x cur).
• One ramp per dac tests only the comparator of that phase: the result is in trip0, trip1/trip2 stay 0. Rotate the axis by hand between runs to check the others.

5. Fault handling and outputs:

• While running, HV_OVERCURRENT_HW trips caused by the search are masked out of hv_error; any other hv_fault (and all faults when idle, done or failed) pass through to fault0.
• With en <= 0 the bridge is off and dac outputs the last result, or dac_lo before the first run; an interrupted or failed run returns state to 0, a finished one keeps state = 2.
• On success or failure the comparator is left at the last passing dac (the result, or dac_lo).
• cmd_mode is 1 (current mode) from nrt_init.

After fail = 1 (bad cur) on the first run, the dac output is 0 until en drops, because the search bounds were never set; the bridge stays off meanwhile. The console text for fail = 3 also says “disabled”, but disabling does not set fail.

Pins #

References #

Source: .c File